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Creators/Authors contains: "Kitchen, Jennifer"

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  1. ; ; (, 2023 IEEE 41st VLSI Test Symposium (VTS))
    Full Text Available 
  2. ; ; (, IEEE International Midwest Symposium on Circuits and Systems)
    This work proposes rapid synthesis of analog builtin self-test (BIST) circuits using a streamlined design methodology that pulls BIST circuit architecture(s) from a library of components and synthesizes the circuit(s) using a circuit-level design automation (DA) algorithm that combines Multivariate Regression models with Geometric Programming optimization. The presented design methodology is verified through the design of two current-sense BIST circuits for insertion into two different DC-DC converter applications. For each of the two experimental cases, a topology is automatically selected for BIST current sensing, and then the BIST circuit is rapidly sized using the presented DA algorithm. 
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    Accepted Manuscript Full Text Available
  3. ; ; (, Proceedings IEEE International Symposium on Circuits and Systems)
    This work proposes a novel design automation (DA) technique that uses a multifaceted approach combining Multivariate Regression with Geometric Programming (GP) to design analog circuits. Previous DA methods employing GP have typically used analytical derivations of the various design equations representing an analog circuit. The proposed DA method eliminates the need for analytical derivations by using simulation data and multivariate regression to generate statistical models combined with GP to solve these statistical expressions with respect to optimum circuit design parameters. This presented statistical GP method has been applied to successfully design a five-transistor two-stage operational amplifier and a folded cascode amplifier in a TSMC 65nm CMOS technology. The presented statistical GP DA results are comparable to the design results obtained from both analytical GP 
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    Accepted Manuscript Full Text Available